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Kaby Lake CPUs will also be able to hit those peak speeds faster than before, thanks to an improved version of the SpeedShift technology that first appeared in Skylake. Intel calls this improved process “14-nm plus.” Those improvements result in faster-switching transistors that are good for what Intel describes as “four or five speed bins” of extra clock speed, or about 400 to 500 MHz higher Turbo frequencies at the top end of a CPU’s range. To improve Kaby Lake’s performance, Intel says it’s optimized its 14-nm tri-gate process so that it can lay down taller fins with a wider gate pitch. Getting the most out of the 14-nm process
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We got a clearer picture of just what this third step in the new Intel architecture life cycle means at IDF a couple weeks back, so let’s dive in. Today, Intel is raising the curtain on its Kaby Lake (or “seventh-generation Core”) CPUs. Now it’s time for the “optimize” part of the 14-nm show. A little over a year ago, we got our first taste of the Skylake “tock,” which ditched the fully-integrated voltage regulator (FIVR) of Haswell and Broadwell chips and introduced Intel’s Gen9 integrated graphics to the world, among other refinements. That new model, “process-architecture-optimize,” began its latest swing back in August 2014 with the Broadwell architecture, Intel’s first time out with its 14-nm tri-gate process. In March of this year, Intel revealed that it would be adding a third stage to its traditional tick-tock model of technical advancement. Moore’s Law may not be dead, but it is changing.